In semiconductor device assembly, a semiconductor chip (or "die") may be bonded directly to a packaging substrate, without the need for a separate leadframe or for separate I/O connectors (e.g. wire or tape). Such chips are typically formed with ball-shaped beads or bumps of solder affixed to their I/O bonding pads such as in a Ball Grid Array (BGA). During packaging, the chip is "flipped" onto its active circuit surface in a manner forming a direct electrical connection between the solder bumps of the chip and conductive traces on a packaging substrate. Semiconductor chips of this type are commonly referred to as "flip chips", and are advantageously of a comparatively reduced size. For example, in current flip chip designs, the semiconductor die may be dimensioned as small as about 0.05.times.0.05 inch whereas the unbonded solder bumps arranged of a surface thereof may have a diameter on the order of 4 to 5 mils.
Briefly and as shown in FIG. 1, a prior art flip chip packaging assembly 10 may be constructed using conventional fabrication techniques. This packaging assembly 10 includes a semiconductor die 11 which is electrically interconnected to a packaging substrate 12 through solder joints 13. The die 11 is then mechanically mounted to the substrate 12 employing a cured layer 14 of underfill epoxy. This fabrication process, thus, produces a mechanically, as well as electrically, bonded chip assembly.
However, prior to mounting the die 11 to the substrate 12, the array of I/O bonding pads 15 on the die must be properly aligned to the array of conductive traces on the packaging substrate to assure proper attachment therebetween. Due to the small dimensions of the flip chip packaging assemblies 10, the alignment must be accurate within .+-.1 ml. Such alignment precision is achievable using current alignment technology; however, the alignment assemblies involved are substantially complex in nature, requiring extensive calibration and are prone to breakdown. Maintenance, therefore, is relatively costly and often results in substantial down-time.
These prior art alignment systems are typically separated into two categories which include mechanical alignment systems, and optical alignment systems. Mechanical alignment systems generally include locating pins, and a stopper which physically support the semiconductor die and the packaging substrate for relative movement therebetween. Once the die and the substrate are properly mounted to the respective platform, relative movement commences until mechanical stops or the like are engaged to obstruct further relative movement therebetween. The mechanical stops are calibrated to properly align the array of I/O bonding pads with the conductive traces of the packaging substrate for aligned electrical connection.
In other mechanical alignment systems, optical sensors or precision robotics may be employed to provide precise relative movement for alignment purposes. Examples of these mechanical systems include pneumatic systems with index points, physical robotics systems, fiber optic systems, or the like.
While these mechanical alignment assemblies adequately position the semiconductor die and packaging substrate for alignment purposes, one problem associated with these systems is that they are often mechanically complex involving a substantial number of moving components. As mentioned, these systems must be extensively calibrated to function properly. Once the cooperating components begin to wear, alignment problems occur which in turn require parts replacement and/or re-calibration. Maintenance costs, therefore, tend to be relatively costly. Moreover, the alignment process between the die and the substrate is typically time consuming to achieve since the substrate will be brought over to the bonding site mechanically and the alignment is also done mechanically as well before attach to the die to the substrate.
Another problem associated with these mechanical alignment systems is that the substrate may be physically damaged upon contact with the alignment system moving components. This is particularly true with those alignment systems employing mechanical stops and/or robotics assemblies.
The other conventional alignment system employed to align the die and the substrate involve precision optical sensor techniques to center the flip chip packages. Generally, a plurality of optical sensors and transmitters are deployed at strategic positions about the die and the substrate to facilitate alignment. Upon alignment of the opposed optical sensors, or with a designated reference point, the die and the substrate may be properly aligned when combined with precise mechanical transports. More advanced optical techniques include pattern recognition systems which are adapted to recognize the pattern of solder joint arrays and the conductive trace circuitry of the substrate.
Both optical techniques require complex circuitry, programming, and machinery to advance the optical alignment. Thus, calibration is difficult. These factors, hence, substantially increase fabrication and maintenance costs. Moreover, operation speeds are relatively slow due to the difficulty of implementation, the current optical alignment technology available, as well as the precise nature of the optical alignment.